Current-mode logic (CML), or source-coupled logic (SCL), is a digital design style used both for logic gates and for board-level digital signaling of digital data. The basic principle of CML is that current from a constant-current generator is steered between two alternate paths depending on whether a logic zero or logic one is being represented.
Current-mode logic (CML), or source-coupled logic (SCL), is a digital design style used both for logic gates and for board-level digital signaling of digital data. The basic principle of CML is that current from a constant-current generator is steered between two alternate paths depending on whether a logic zero or logic one is being represented.
Source: Wikipedia "Current-mode logic" · CC BY-SA 4.0
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