Interface logic model

In electronics, the interface logic model (ILM) is a technique to model blocks in hierarchical VLSI implementation flow. It is a gate level model of a physical block where only the connections from the inputs to the first stage of flip-flops, and the connections from the last stage of flip-flops to the outputs are in the model, including the flip-flops and the clock tree driving these flip-flops.

Source: Wikipedia — Interface logic model (CC BY-SA 4.0)

Interface logic model

In electronics, the interface logic model (ILM) is a technique to model blocks in hierarchical VLSI implementation flow. It is a gate level model of a physical block where only the connections from the inputs to the first stage of flip-flops, and the connections from the last stage of flip-flops to the outputs are in the model, including the flip-flops and the clock tree driving these flip-flops.

This neuron ends here.

Source: Wikipedia "Interface logic model" · CC BY-SA 4.0

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